Patrick Yang, CTO at WCH, has recently unveiled the CH570 RISC-V SoC with 2.4GHz wireless and USB 2.0 (host & device) as an upgrade to the popular CH32V003 general-purpose RISC-V MCU with more ...

Over the past 25 years we have seen the transition from SDRAM (Synchronous Dynamic RAM) to DDR (Double Data Rate) SDRAM, and then to DDR2, DDR3 and DDR4 on a cadence of five year cycles.